MOS Capacitor Characteristics of 3C-SiC Films Deposited on Si Substrates at 1270°C

Abstract

SiC films were deposited on Si substrate by low pressure hot-wall CVD using C3H8 (5% in H2)-SiH4 (2.5% in H2)-H2 gas system at 1270°C and 1370°C. MOS capacitors were fabricated on the grown 3C-SiC films. In this paper, we compare the electrical characteristics of MOS capacitors fabricated on 3C-SiC films deposited at high and low temperatures, 1370oC and 1270oC, respectively. The cross-sectional TEM images indicate similar SiC/Si interface microstructural quality for 3C-SiC films deposited at different temperatures, though a quicker elimination rate of stacking fault with increasing thickness at 1370oC, and rocking curves from XRD measurements indicate better crystalline perfection at 1370oC. The average surface roughness measurements performed by an atomic force microscope show that the surface roughness increases with elevated deposition temperature. The MOS capacitors were characterized by high-frequency capacitance-voltage (HFCV), conductance-voltage (G-V), and current-voltage (I-V) measurements at room temperature. The MOS capacitors fabricated on both films exhibit good and almost identical C-V characteristics. Measurements of current-voltage characteristics in accumulation region showed smaller leakage for the film deposited at 1270°C. It is concluded that the decrease of the deposition temperature from 1370°C to 1270°C does not bring any remarkable negative impact on the interface properties of fabricated MOS capacitors.