Derivation of a nonlinear variance equation and its application to SOI Technology

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Title Derivation of a nonlinear variance equation and its application to SOI Technology
Author Rowlands, David Duanne; Dimitrijev, Sima
Journal Name IEEE Transactions on Semiconductor Manufacturing
Year Published 2000
Place of publication USA
Publisher Institute of Electrical and Electronics Engineers
Abstract An analytic nonlinear equation for variance was derived along with a method based on response surface mapping techniques to calculate the variance using the proposed equation. The technique was applied to the threshold voltage of a 0.1-μm silicon-on-insulator MOS device, and the variance value obtained was verified using Monte Carlo simulation. The threshold voltage dependence upon active-layer thickness was found to be highly nonlinear due to the device's going from the fully depleted to the partially depleted regime. Analysis of the variance showed that the effect of the nonlinear terms (18.7%) is more important than the effect of the mixed term (-0.7%) and almost as important as the contribution of the second most dominant input-process parameter (23.6%). This illustrates the importance of the proposed nonlinear equation
Peer Reviewed Yes
Published Yes
Alternative URI http://dx.doi.org/10.1109/66.892635
Copyright Statement Copyright 2000 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Volume 13
Page from 492
Page to 496
ISSN 0894-6507
Date Accessioned 2001-01-01
Language en_AU
Research Centre Queensland Micro and Nanotechnology Centre
Subject PRE2009-Science & Technology
URI http://hdl.handle.net/10072/3041
Publication Type Article in Scholarly Refereed Journal
Publication Type Code c1

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