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dc.contributor.authorReaz, MBI
dc.contributor.authorMohd-Yasin, F
dc.contributor.authorTan, SL
dc.contributor.authorTan, HY
dc.contributor.authorIbrahimy, MI
dc.date.accessioned2017-05-03T11:49:47Z
dc.date.available2017-05-03T11:49:47Z
dc.date.issued2005
dc.date.modified2012-09-04T22:42:07Z
dc.identifier.isbn0-7803-8834-8
dc.identifier.issn0271-4302
dc.identifier.doi10.1109/ISCAS.2005.1465105
dc.identifier.urihttp://hdl.handle.net/10072/46691
dc.description.abstractWe present the realization of partial encryption of compressed images on an Altera FLEX10K FPGA device that allows for efficient hardware implementation. The compression algorithm decomposes images into several different parts. A secure encryption algorithm is then used to encrypt only the crucial parts, which are considerably smaller than the original image. This results in significant reduction in processing time and computational requirement for encryption and decryption. The breadth-first traversal linear lossless quadtree decomposition method is used for the partial compression and RSA is used for the encryption. Functional simulations are carried out to verify the functionality of the individual modules and the system on four different images. The comparisons, verification and analysis made validate the advantage of this approach. The design has utilized 2928 units of LC and a system frequency of 13.42 MHz.
dc.description.peerreviewedYes
dc.description.publicationstatusYes
dc.format.extent207904 bytes
dc.format.mimetypeapplication/pdf
dc.languageEnglish
dc.publisherIEEE
dc.publisher.placeUnited States
dc.relation.ispartofstudentpublicationN
dc.relation.ispartofconferencenameIEEE International Symposium on Circuits and Systems (ISCAS)
dc.relation.ispartofconferencetitle2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS
dc.relation.ispartofdatefrom2005-05-23
dc.relation.ispartofdateto2005-05-26
dc.relation.ispartoflocationKobe, JAPAN
dc.relation.ispartofpagefrom2385
dc.relation.ispartofpageto2388
dc.rights.retentionY
dc.subject.fieldofresearchElectrical and Electronic Engineering not elsewhere classified
dc.subject.fieldofresearchcode090699
dc.titlePartial encryption of compressed images employing FPGA
dc.typeConference output
dc.type.descriptionE1 - Conferences
dc.type.codeE - Conference Publications
gro.rights.copyright© 2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
gro.date.issued2005
gro.hasfulltextFull Text
gro.griffith.authorMohd-Yasin, Faisal


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    Contains papers delivered by Griffith authors at national and international conferences.

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